68HC11
- Código: Selecionar todos
* Hardware definitions
IO_START EQU $1000 START OF HC11 ON-CHIP I/O
ROM_START EQU $0000 START OF MONITOR CODE
RAM_INTERN EQU $0000
HARD_VECT EQU $1FD6 START OF HARDWARE VECTORS
USER_PROGRAM EQU $4000
RAM_VEC EQU $5FD6
*
PAGE
*============================================================================
* Define HC11 I/O register locations (68HC11A8)
ORG IO_START
H11PORTA RMB 1 ;X000 i/o port A
RMB 1 ;X001 reserved
H11PIOC RMB 1 ;X002 i/o port C control
H11PORTC RMB 1 ;X003 i/o port C
H11PORTB RMB 1 ;X004 i/o port B
H11PORTCL RMB 1 ;X005 i/o port CL
RMB 1 ;X006 reserved
H11DDRC RMB 1 ;X007 data direction for port C
H11PORTD RMB 1 ;X008 i/o port D
H11DDRD RMB 1 ;X009 data direction for port D
H11PORTE RMB 1 ;X00A input port E
H11CFORC RMB 1 ;X00B compare force register
H11OC1M RMB 1 ;X00C OC1 action mask register
H11OC1D RMB 1 ;X00D OC1 action data register
H11TCNT RMB 2 ;X00E timer counter register
H11TIC1 RMB 2 ;X010 input capture register 1
H11TIC2 RMB 2 ;X012 input capture register 2
H11TIC3 RMB 2 ;X014 input capture register 3
H11TOC1 RMB 2 ;X016 output compare register 1
H11TOC2 RMB 2 ;X018 output compare register 2
H11TOC3 RMB 2 ;X01A output compare register 3
H11TOC4 RMB 2 ;X01C output compare register 4
H11TOC5 RMB 2 ;X01E output compare register 5
H11TCTL1 RMB 1 ;X020 timer control register 1
H11TCTL2 RMB 1 ;X021 timer control register 2
H11TMSK1 RMB 1 ;X022 main timer interrupt mask 1
H11TFLG1 RMB 1 ;X023 main timer interrupt flag 1
H11TMSK2 RMB 1 ;X024 misc timer interrupt mask 2
H11TFLG2 RMB 1 ;X025 misc timer interrupt flag 2
H11PACTL RMB 1 ;X026 pulse accumulator control register
H11PACNT RMB 1 ;X027 pulse accumulator count register
H11SPCR RMB 1 ;X028 SPI control register
H11SPSR RMB 1 ;X029 SPI status register
H11SPDR RMB 1 ;X02A SPI data in/out
H11BAUD RMB 1 ;X02B SCI baud rate control
H11SCCR1 RMB 1 ;X02C SCI control register 1
H11SCCR2 RMB 1 ;X02D SCI control register 2
H11SCSR RMB 1 ;X02E SCI status register
H11SCDR RMB 1 ;X02F SCI data
H11ADCTL RMB 1 ;X030 A to D control register
H11ADR1 RMB 1 ;X031 A to D result 1
H11ADR2 RMB 1 ;X032 A to D result 2
H11ADR3 RMB 1 ;X033 A to D result 3
H11ADR4 RMB 1 ;X034 A to D result 4
H11BPROT RMB 1 ;X035 EEPROM block protect
RMB 2 ;X036 reserved
H11OPT2 RMB 1 ;X038 system configuration options 2
H11OPTION RMB 1 ;X039 system configuration options
H11COPRST RMB 1 ;X03A arm/reset COP timer circutry
H11PPROG RMB 1 ;X03B EEPROM programming control
H11HPRIO RMB 1 ;X03C highest priority I-bit and misc.
H11INIT RMB 1 ;X03D ram/io mapping register
H11TEST1 RMB 1 ;X03E factory test control register
H11CONFIG RMB 1 ;X03F COP, ROM, & EEPROM enables
RMB 16 ;X040 reserved
RMB 12 ;X050 reserved
H11CSSTRH RMB 1 ;X05C Chip select clock stretch
H11CSCTL RMB 1 ;X05D Chip select control
H11CSGADR RMB 1 ;X05E General purpose CS address
H11CSGSIZ RMB 1 ;X05F General purpose CS size
*
*
*============================================================================
* HARDWARE PLATFORM CUSTOMIZATIONS
*============================================================================
*
* Put you UART equates here
SER_STATUS EQU H11SCSR STATUS FROM SCI
SER_RXDATA EQU H11SCDR DATA FROM SCI
SER_TXDATA EQU H11SCDR DAT TO SCI
RXRDY EQU $20
TXRDY EQU $40 TRANSMIT COMPLETE (FOR TURNOFF)
*
*===========================================================================
ORG RAM_INTERN
_v
FILL 0,3
_i
FILL 0,1
_a
FILL 0,1
_temp
FILL 0,1
R3 RMB 1
R2 RMB 1
ORG ROM_START
RESET
* Initialize your UART here
* (SCI at 19200 baud from 3Mhz Mhz crystal)
LDAA #$01 PRE-DIV BY 1; DIV BY 2
STAA H11BAUD
LDAA #$00 8 BIT DATA
STAA H11SCCR1
LDAA #$0C TX AND RX ENABLED, NO INTS, NO WAKE
STAA H11SCCR2
LDS #$5FFF
LDX #USER_PROGRAM
LDAA #'M'
PED_H:
BSR PUTCHAR
BSR GETCHAR
STAA R3
BSR PUTCHAR
BSR GETCHAR
LDAA #'M'
PED_L:
BSR PUTCHAR
BSR GETCHAR
STAA R2
BSR PUTCHAR
BSR GETCHAR
PED_C:
LDAA #'M'
BSR PUTCHAR
BSR GETCHAR
STAA 0,X
LDAA 0,X
BSR PUTCHAR
INX
BSR GETCHAR
DEC R2
BNE MSB
DEC R3
MSB:
LDAA #0FFH
CMPA R3
BNE PED_C
JMP PROGRAMA
*
*===========================================================================
* Get a character to A
*
GETCHAR
LDAA SER_STATUS READ DEVICE STATUS
ANDA #RXRDY
BEQ GETCHAR NOT READY YET.
LDAA SER_RXDATA READ DATA
RTS
*
*===========================================================================
* Output character in A
*
* Uses 5 bytes of stack including return address
*
PUTCHAR
PSHA
PC10 LDAA SER_STATUS CHECK TX STATUS
ANDA #TXRDY TX READY ?
BEQ PC10
PULA
STAA SER_TXDATA TRANSMIT CHAR.
RTS
SCI_ENT LDX RAM_VEC+0
JMP 0,X
*
SPI_ENT LDX RAM_VEC+2
JMP 0,X
*
PACE_ENT LDX RAM_VEC+4
JMP 0,X
*
PACO_ENT LDX RAM_VEC+6
JMP 0,X
*
TOV_ENT LDX RAM_VEC+8
JMP 0,X
*
TCOMP5_ENT LDX RAM_VEC+10
JMP 0,X
*
TCOMP4_ENT LDX RAM_VEC+12
JMP 0,X
*
TCOMP3_ENT LDX RAM_VEC+14
JMP 0,X
*
TCOMP2_ENT LDX RAM_VEC+16
JMP 0,X
*
TCOMP1_ENT LDX RAM_VEC+18
JMP 0,X
*
TCAP3_ENT LDX RAM_VEC+20
JMP 0,X
*
TCAP2_ENT LDX RAM_VEC+22
JMP 0,X
*
TCAP1_ENT LDX RAM_VEC+24
JMP 0,X
*
RTC_ENT LDX RAM_VEC+26
JMP 0,X
*
IRQ_ENT LDX RAM_VEC+28
JMP 0,X
SWI_ENTRY LDX RAM_VEC+30
JMP 0,X
XIRQ_ENTRY LDX RAM_VEC+32
JMP 0,X
ILLOP_ENT LDX RAM_VEC+34
JMP 0,X
COP_ENT LDX RAM_VEC+36
JMP 0,X
CLOCK_ENT LDX RAM_VEC+38
JMP 0,X
*
* INTERRUPT VECTORS
ORG HARD_VECT
*
* VECTORS THROUGH RAM
VEC0 FDB SCI_ENT+#$2000 ffd6
FDB SPI_ENT+#$2000 ffd8
FDB PACE_ENT+#$2000 ffda
FDB PACO_ENT+#$2000 ffdc
FDB TOV_ENT+#$2000 ffde
FDB TCOMP5_ENT+#$2000 ffe0
FDB TCOMP4_ENT+#$2000 ffe2
FDB TCOMP3_ENT+#$2000 ffe4
FDB TCOMP2_ENT+#$2000 ffe6
FDB TCOMP1_ENT+#$2000 ffe8
FDB TCAP3_ENT+#$2000 ffea
FDB TCAP2_ENT+#$2000 ffec
FDB TCAP1_ENT+#$2000 ffee
FDB RTC_ENT+#$2000 fff0
FDB IRQ_ENT+#$2000 fff2
FDB XIRQ_ENTRY+#$2000 fff4 (non-maskable interrupt)
FDB SWI_ENTRY+#$2000 fff6 SWI/breakpoint
FDB ILLOP_ENT+#$2000 fff8 illegal op-code
FDB COP_ENT+#$2000 fffa Watchdog timeout
FDB CLOCK_ENT+#$2000 fffc clock fail
FDB RESET+#$2000 fffe reset
*
ORG #4000H
PROGRAMA
ORG RAM_VEC
*
END RESET
SAB80166
- Código: Selecionar todos
;*****************************************************************
; BOOT PARA O 80C166
; MIGUEL ALEXANDRE WISINTAINER
;*****************************************************************
name BOOT166 ; modulname
%target 166 ; code for SAB80C166
%list ; generate listing
%debug ; symbols to HEX-file
%optimize 3 ; constant and jump optimization
%expand ; expand macros in listing
LCD_STATUS EQU 0A002H
INSTRUCTION_INPUT EQU 0A000H
DATA_INPUT EQU 0A001H
org 0 ; abolut address 0
jmp far Startup ; RESTART-Vektor
;****************************************************
;INTERRUPTS
;****************************************************
org 08h
NON_MASK_INTER_A:
;jmps SEG NON_MASK_INTER_L, SOF NON_MASK_INTER_L
JMP FAR 2008H
org 10h
STACK_OVERFLOW_A:
;jmpS SEG STACK_OVERFLOW_L, SOF STACK_OVERFLOW_A
JMP FAR 2010H
org 18h
STACK_UNDERFLOW_A:
;jmps SEG STACK_UNDERFLOW_A, SOF STACK_UNDERFLOW_A
JMP FAR 2018H
org 28h
CLASS_B_TRAP:
;jmpS SEG CLASS_B_TRAP, SOF CLASS_B_TRAP
JMP FAR 2028H
org 2ch
RESERVED:
;jmpS SEG RESERVED, SOF RESERVED
JMP FAR 202CH
org 40H
CAPCOM_R0:
;jmpS SEG CAPCOM_R0_L, SOF CAPCOM_R0_L
JMP FAR 2040H
org 44H
CAPCOM_R1:
;jmpS SEG CAPCOM_R1_L, SOF CAPCOM_R1_L
JMP FAR 2044H
org 48H
CAPCOM_R2:
;jmpS SEG CAPCOM_R2_L, SOF CAPCOM_R2_L
JMP FAR 2048H
org 4CH
CAPCOM_R3:
;jmpS SEG CAPCOM_R3_L, SOF CAPCOM_R3_L
JMP FAR 204CH
org 50H
CAPCOM_R4:
;jmpS SEG CAPCOM_R4_L, SOF CAPCOM_R4_L
JMP FAR 2050H
org 54H
CAPCOM_R5:
;jmpS SEG CAPCOM_R5_L, SOF CAPCOM_R5_L
JMP FAR 2054H
org 58H
CAPCOM_R6:
;jmpS SEG CAPCOM_R6_L, SOF CAPCOM_R6_L
JMP FAR 2058H
org 5CH
CAPCOM_R7:
;jmpS SEG CAPCOM_R7_L, SOF CAPCOM_R7_L
JMP FAR 205CH
org 60H
CAPCOM_R8:
;jmpS SEG CAPCOM_R8_L, SOF CAPCOM_R8_L
JMP FAR 2060H
org 64H
CAPCOM_R9:
;jmpS SEG CAPCOM_R9_L, SOF CAPCOM_R9_L
JMP FAR 2064H
org 68H
CAPCOM_R10:
;jmpS SEG CAPCOM_R10_L, SOF CAPCOM_R10_L
JMP FAR 2068H
org 6CH
CAPCOM_R11:
;jmpS SEG CAPCOM_R11_L, SOF CAPCOM_R11_L
JMP FAR 206CH
org 70H
CAPCOM_R12:
;jmpS SEG CAPCOM_R12_L, SOF CAPCOM_R12_L
JMP FAR 2070H
org 74H
CAPCOM_R13:
;jmpS SEG CAPCOM_R13_L, SOF CAPCOM_R13_L
JMP FAR 2074H
org 78H
CAPCOM_R14:
;jmpS SEG CAPCOM_R14_L, SOF CAPCOM_R14_L
JMP FAR 2078H
org 7CH
CAPCOM_R15:
;jmpS SEG CAPCOM_R15_L, SOF CAPCOM_R15_L
JMP FAR 207CH
org 80H
CAPCOM_T0:
;jmpS SEG CAPCOM_T0_R,SOF CAPCOM_T0_R
JMP FAR 2080H
org 84H
CAPCOM_T1:
;jmpS SEG CAPCOM_T1_L, SOF CAPCOM_T1_L
JMP FAR 2084H
org 88H
GPT1_T2:
;jmpS SEG GPT1_T2_L, SOF GPT1_T2_L
JMP FAR 2088H
org 8CH
GPT1_T3:
;jmpS SEG GPT1_T3_L, SOF GPT1_T3_L
JMP FAR 208CH
org 90H
GPT1_T4:
;jmpS SEG GPT1_T4_L, SOF GPT1_T4_L
JMP FAR 2090H
org 94H
GPT2_T5:
;jmpS SEG GPT2_T5_L, SOF GPT2_T5_L
JMP FAR 2094H
org 98H
GPT2_T6:
;jmpS SEG GPT2_T6_L, SOF GPT2_T6_L
JMP FAR 2098H
org 9CH
GPT2_CAP:
;jmpS SEG GPT2_CAP_L, SOF GPT2_CAP_L
JMP FAR 209CH
org 0A0H
AD_COMPLET:
;jmpS SEG AD_COMPLET_L, SOF AD_COMPLET_L
JMP FAR 20A0H
org 0A4H
AD_OVERRUN:
;jmpS SEG AD_OVERRUN_L, SOF AD_OVERRUN_L
JMP FAR 20A4H
org 0A8H
SER_CHAN_0_TX:
;jmpS SEG SER_CHAN_0_TX_L, SOF SER_CHAN_0_TX_L
JMP FAR 20A8H
org 0ACH
SER_CHAN_0_RX:
;jmpS SEG SER_CHAN_0_RX_L, SOF SER_CHAN_0_RX_L
JMP FAR 20ACH
org 0B0H
SER_CHAN_0_ERROR:
;jmpS SEG SER_CHAN_0_ERROR_L, SOF SER_CHAN_0_ERROR_L
JMP FAR 20B0H
org 0B4H
SER_CHAN_1_TX:
;jmpS SEG SER_CHAN_1_TX_L, SOF SER_CHAN_1_TX_L
JMP FAR 20B4H
org 0B8H
SER_CHAN_1_RX:
;jmpS SEG SER_CHAN_1_RX_L, SOF SER_CHAN_1_RX_L
JMP FAR 20B8H
org 0BCH
SER_CHAN_1_ERROR:
;jmpS SEG SER_CHAN_1_ERROR_L, SOF SER_CHAN_1_ERROR_L
JMP FAR 20BCH
Startup:
DISWDT
EINIT
mov cp,#0FD00H ; set CP
MOV SP,#0FC00H
MOV STKUN,#0FC00H
MOV STKOV,#0FA00H
bset p3.13 ; set port p3.13 wr
bset dp3.13 ; set port p3.10 wr
bset p3.10 ; set port p3.10 txd
bset dp3.10 ; set port p3.10 txd
bclr dp3.11 ; set port p3.11 rxd
bclr s0con.2 ;
bclr s0con.1 ; * DATA BIT
bset s0con.0 ;
bclr s0stp ; 1 stop bit
bset s0ren
mov s0bg,#001FH ; 9600
bset s0r ; Baud Rate on
MOVB RL0,#6
CALL COMMAND_OUT
MOVB RL0,#0CH
CALL COMMAND_OUT
MOVB RL0,#38H
CALL COMMAND_OUT
MOVB RL0,#0FH
CALL APRESENTA
; ENDERECO PROGRAMA EM RAM
mov r2,#programa_em_ram
; R3 CONTEM O TAMANHO DO ARQUIVO
; LIMPAR BUFFER DE RECEPCAO
movb rl1,S0RBUF
PED_H:
MOVb s0tbuf,#'M'
ESP_H: jnb S0RIR, ESP_H ; receives one byte
bclr S0RIR
movb rl1, S0RBUF
movb rh3, rl1
MAN_H_R:
movb S0TBUF,rl1
ESP_FF_H: jnb S0RIR, ESP_FF_H
bclr S0RIR
movb rl4,S0RBUF ;LIXO
PED_L:
MOVb s0tbuf,#'M'
ESP_L: jnb S0RIR, ESP_L ; receives one byte
bclr S0RIR
movb rl1, S0RBUF
movb rl3, rl1
MAN_L_R:
movb S0TBUF,rl1
ESP_FF_L: jnb S0RIR, ESP_FF_L
bclr S0RIR
movb rl4,S0RBUF ;LIXO
PED_C:
MOVb s0tbuf,#'M'
ESP_C: jnb S0RIR, ESP_C ; receives one byte
bclr S0RIR
movb rl1, S0RBUF
movb [r2],rl1
MAN_C_R:
movb S0TBUF,[R2]
add R2,#1
ESPERA_FF_C:jnb S0RIR, ESPERA_FF_C
bclr S0RIR
movb rl4,S0RBUF ;LIXO
SUB R3,#1
CMP R3,#0
jmp cc_NZ, PED_C
JMP FAR PROGRAMA_EM_RAM
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
COMMAND_OUT:
PUSH PSW
PUSH R0
PUSH R1
BUSY1:
MOV R1,#LCD_STATUS
MOVB RL1,[R1]
ANDB RL1,#80H
CMPB RL1,#80H
JMP CC_Z,BUSY1
MOV R1,#INSTRUCTION_INPUT
MOVB [R1],RL0
POP R1
POP R0
POP PSW
RET
DATA_OUT:
PUSH PSW
PUSH R0
PUSH R1
BUSY2:
MOV R1,#LCD_STATUS
MOVB RL1,[R1]
ANDB RL1,#80H
CMPB RL1,#80H
JMP CC_Z,BUSY2
MOV R1,#DATA_INPUT
MOVB [R1],RL0
POP R1
POP R0
POP PSW
RET
HOME_CURSOR:
PUSH R0
MOV RL0,#2
CALL COMMAND_OUT
POP R0
RET
CURSOR_OFF:
PUSH R0
MOV RL0,#0CH
CALL COMMAND_OUT
POP R0
RET
SET_C_M:
PUSH PSW
PUSH R0
ADDB RL0,#80H
CALL COMMAND_OUT
POP R0
POP PSW
RET
SET_C_R:
PUSH PSW
PUSH R0
ADDB RL0,#0C0H
CALL COMMAND_OUT
POP R0
POP PSW
RET
CLEAR_DISPLAY:
PUSH R0
MOVB RL0,#1H
CALL COMMAND_OUT
POP R0
RET
CURS_ON:
PUSH R0
MOV RL0,#0FH
CALL COMMAND_OUT
POP R0
NOP
RET
I_MEN_LCD: PUSH PSW
PUSH R0
PUSH R1
COM_SE_NULL_I:
MOVB RL0,[R1]
CMPB RL0,#0
JMP CC_Z,S_MEN_I
IMP_I:
CALL DATA_OUT
ADD R1,#1
JMP COM_SE_NULL_I
S_MEN_I:
POP R1
POP R0
POP PSW
RET
I_MEN_SERIAL:
PUSH PSW
PUSH R0
PUSH R1
COM_SE_NULL_S:
MOVB RL0,[R1]
CMP RL0,#0
JMP CC_Z,S_MEN_S
IMP_S:
CALL MANDA_SERIAL
ADD R1,#1
JMP COM_SE_NULL_S
S_MEN_S:
POP R1
POP R0
POP PSW
RET
MANDA_SERIAL:
PUSH R0
CALL PUTCHAR
CALL GETCHAR
POP R0
RET
GETCHAR:
ESP_MAND: jnb S0RIR, ESP_MAND ; receives one byte
bclr S0RIR
movb rl0, S0RBUF
RET
PUTCHAR:
MOVb s0tbuf,RL0
RET
LE_BYTE:
MOVB RL0,#255
CALL PUTCHAR
CALL GETCHAR
RET
IMP_CHAR_S:
CALL MANDA_SERIAL
RET
CLEAR_TERMINAL:
MOVB RL0,#252
CALL PUTCHAR
CALL GETCHAR
RET
;************************
;R4= VALOR A SER IMPRESSO (8 BITS)
;************************
IMP_B_SERIAL:
PUSH PSW
PUSH R0
PUSH R1
PUSH R2
PUSH R3
PUSH R4
MOV R2,#0
MOV R0,#000AH
NAO_ZERO:
MOV R1,R4
MOV MDL,RL1
DIVU R0
MOV R1,MDH
PUSH R1 ; SALVA RESTO NA PILHA
MOV R3,R1
MOV R1,R4
MOV MDL,R1
DIVU R0
MOV R1,MDL
MOV R4,R1
ADD R2,#1
CMP R1,#0
JMP CC_Z,EH_ZERO
JMP NAO_ZERO
EH_ZERO:
POP R1 ; RESTAURA RESTO DA PILHA
ADD RL1,#48
MOV S0TBUF,RL1
CALL GETCHAR
SUB R2,#1
CMP R2,#0
JMP CC_NZ,EH_ZERO
POP R4
POP R3
POP R2
POP R1
POP R0
POP PSW
RET
;************************
;R4= VALOR A SER IMPRESSO 8 BITS
;************************
IMP_B_LCD:
PUSH PSW
PUSH R0
PUSH R1
PUSH R2
PUSH R3
PUSH R4
MOV R2,#0
MOV R0,#000AH
NAO_ZERO_LCD:
MOV R1,R4
MOV MDL,RL1
DIVU R0
MOV R1,MDH
PUSH R1 ; SALVA RESTO NA PILHA
MOV R3,R1
MOV R1,R4
MOV MDL,R1
DIVU R0
MOV R1,MDL
MOV R4,R1
ADD R2,#1
CMP R1,#0
JMP CC_Z,EH_ZERO_LCD
JMP NAO_ZERO_LCD
EH_ZERO_LCD:
POP R1 ; RESTAURA RESTO DA PILHA
ADD RL1,#48
PUSH R0
MOV RL0,RL1
CALL DATA_OUT
POP R0
SUB R2,#1
CMP R2,#0
JMP CC_NZ,EH_ZERO_LCD
POP R4
POP R3
POP R2
POP R1
POP R0
POP PSW
RET
APRESENTA:
CALL CLEAR_DISPLAY
MOV R1,#MEN_1
CALL I_MEN_LCD
MOV RL0,#1
CALL SET_C_R
MOV R1,#MEN_2
CALL I_MEN_LCD
RET
MEN_1 DB "SAB80166",0
MEN_2 DB "NOV, 1999",0
ORG 2000H
programa_em_ram:
end
80C552
- Código: Selecionar todos
;***************************************************************************
;SISTEMA OPERACIONAL PARA O SISTEMA MINIMO BASEADO NO MICROCONTROLADOR 8031
;DA FAMILIA MCS-51
;PROJETISTA
; MIGUEL ALEXANDRE WISINTAINER
;
;OBJETIVO: DAR A CARGA DE UM PROGRAMA .COM GERADO PELO COMPILADOR 8031
; PELA INTERFACE SERIAL (9600 BPS) NO ENDERECO 4000H DA RAM E
; EXECUTA-LO.
;**************************************************************************
.org 0
LJMP INICIO
.org h'3
LJMP ext_0
.org h'b
LJMP timer_0
.org h'13
LJMP ext_1
.org h'1b
LJMP timer_1
.org h'23
LJMP serial
.org h'2b
LJMP I2C
.ORG H'33
LJMP T2_CAP_0
.ORG H'3B
LJMP T2_CAP_1
.ORG H'43
LJMP T2_CAP_2
.ORG H'4B
LJMP T2_CAP_3
.ORG H'53
LJMP ADC
.ORG H'5B
LJMP T2_CP_0
.ORG H'63
LJMP T2_CP_1
.ORG H'6B
LJMP T2_CP_2
.ORG H'73
LJMP TIMER_2
INFO_1:.DB "SISTEMA",0
INFO_2:.DB "8031 ",0
INFO_3:.DB "(C)MIGUEL"
;********************************************************************
COMMAND_OUT:
PUSH DPH
PUSH DPL
MOV DPTR,#LCD_STATUS
PUSH ACC
BUSY:
MOVX A,@DPTR
JB ACC.7,BUSY
POP ACC
MOV DPTR,#INSTRUCTION_INPUT
MOVX @DPTR,A
POP DPL
POP DPH
RET
;********************************************************************
DATA_OUT:
PUSH DPH
PUSH DPL
MOV DPTR,#LCD_STATUS
PUSH ACC
BUSY1:
MOVX A,@DPTR
JB ACC.7,BUSY1
POP ACC
MOV DPTR,#DATA_INPUT
MOVX @DPTR,A
POP DPL
POP DPH
RET
;********************************************************************
CLEAR_DISPLAY:
PUSH ACC
MOV A,#1
ACALL COMMAND_OUT
POP ACC
RET
;********************************************************************
HOME_CURSOR:
PUSH ACC
MOV A,#2
ACALL COMMAND_OUT
POP ACC
RET
;********************************************************************
CURSOR_OFF:
PUSH ACC
MOV A,#H'0C
ACALL COMMAND_OUT
POP ACC
RET
;********************************************************************
SET_C_M:
PUSH ACC
ADD A,#H'80
ACALL COMMAND_OUT
POP ACC
RET
;********************************************************************
SET_C_R:
PUSH ACC
ADD A,#H'C0
ACALL COMMAND_OUT
POP ACC
RET
;********************************************************************
I_MEN_LCD:
PUSH ACC
PUSH DPH
PUSH DPL
COMPARA_SE_NULL_L:
MOVX A,@DPTR
CJNE A,#0,IMP_L
LJMP SAI_MEN_L
IMP_L:
ACALL DATA_OUT
INC DPTR
LJMP COMPARA_SE_NULL_L
SAI_MEN_L:
POP DPL
POP DPH
POP ACC
RET
;********************************************************************
LE_BYTE:
MOV SBUF,#255
ESP_BYTE:
JNB RI,ESP_BYTE
CLR RI
MOV A,SBUF
CLR TI
RET
;********************************************************************
LE_WORD:
MOV SBUF,#254
ESP_LOW_BYTE:
JNB RI,ESP_LOW_BYTE
CLR RI
MOV DPL,SBUF
ESP_HIG_BYTE:
JNB RI,ESP_HIG_BYTE
CLR RI
MOV DPH,SBUF
CLR TI
RET
;********************************************************************
LE_STRING:
PUSH ACC
PUSH DPH
PUSH DPL
MOV SBUF,#253
ESP_LETRA:
JNB RI,ESP_LETRA
CLR RI
MOV A,SBUF
CJNE A,#0,NOR_LETRA
LJMP SAI_LETRA
NOR_LETRA:
MOVX @DPTR,A
INC DPTR
LJMP ESP_LETRA
SAI_LETRA:
MOVX @DPTR,A
POP DPL
POP DPH
POP ACC
CLR TI
RET
;********************************************************************
I_MEN_SERIAL:
PUSH ACC
PUSH DPH
PUSH DPL
COM_SE_NULL_S:
MOVX A,@DPTR
CJNE A,#0,IMP_S
LJMP S_MEN_S
IMP_S:
MOV SBUF,A
ESP_S:
JNB TI,ESP_S
CLR TI
; ESPERA CONFIRMACAO DA IMPRESSAO DO CARACTER
IMS:
JNB RI,IMS
CLR RI
MOV A,SBUF ; SEM VALOR ALGUM PARA A, APENAS CONFIRMACAO
INC DPTR
LJMP COM_SE_NULL_S
S_MEN_S:
POP DPL
POP DPH
POP ACC
RET
;********************************************************************
IMP_BYTE_lcd:
PUSH ACC
PUSH B
PUSH H'00
MOV H'00,#0
NAO_FIM:
MOV B,#D'10
DIV AB
INC H'00
PUSH B
CJNE A,#0,NAO_FIM
IMP_DIGITO:
POP B
MOV A,B
ADD A,#H'30
ACALL DATA_OUT
DJNZ H'00,IMP_DIGITO
POP H'00
POP B
POP ACC
RET
;********************************************************************
IMP_B_serial:
PUSH ACC
PUSH B
PUSH H'00
MOV H'00,#0
NAO_F_S:
MOV B,#D'10
DIV AB
INC H'00
PUSH B
CJNE A,#0,NAO_F_s
IMP_DI_s:
POP B
MOV A,B
ADD A,#H'30
MOV SBUF,A
ESPE_S:
JNB TI,ESPE_S
CLR TI
; ESPERA CONFIRMACAO DA IMPRESSAO DO CARACTER
IBS:
JNB RI,IBS
CLR RI
MOV A,SBUF ; SEM VALOR ALGUM PARA A, APENAS PARA CONFIRMACAO
DJNZ H'00,IMP_DI_s
POP H'00
POP B
POP ACC
RET
;********************************************************************
CLEAR_TERMINAL:
PUSH ACC
MOV SBUF,#252
ESP_TI:
JNB TI,ESP_TI
CLR TI
;ESPERA A TELA APAGAR COMPLETAMENTE
ESP_APAGAR:
JNB RI,ESP_APAGAR
CLR RI
MOV A,SBUF ; AX SEM EFEITO
POP ACC
RET
;*********************************************************************
IMP_CHAR_S:
PUSH ACC
MOV SBUF,A
ESP_TI_C:
JNB TI,ESP_TI_C
CLR TI
; ESPERA CONFIRMACAO DA IMPRESSAO DO CARACTER
ICS:
JNB RI,ICS
CLR RI
MOV A,SBUF ; SEM VALOR ALGUM PARA A, SO PARA CONFIRMACAO
POP ACC
RET
;*********************************************************************
CURS_ON:
PUSH ACC
MOV A,#H'0F
ACALL COMMAND_OUT
POP ACC
RET
;*********************************************************************
VERIFICA_SE_TECLA_PRESSIONADA:
MOV SBUF,#251
ESP_VST:
JNB RI,ESP_VST
CLR RI
MOV A,SBUF
CJNE A,#0,FOI_PRESSIONADA
CLR C
SJMP NAO_FOI_PRESSIONADA
FOI_PRESSIONADA:
SETB C
NAO_FOI_PRESSIONADA:
CLR TI
RET
;*********************************************************************
LE_CODIGO_PRESSIONADA:
MOV SBUF,#250
ESP_COD1:
JNB RI,ESP_COD1
CLR RI
MOV A,SBUF
CJNE A,#0,NA_T_EXTENDIDA
SETB C
SJMP T_EXTENDIDA
NA_T_EXTENDIDA:
CLR C
T_EXTENDIDA:
ESP_COD2:
JNB RI,ESP_COD2
CLR RI
MOV A,SBUF
CLR TI
RET
;*********************************************************************
INICIO:
; PALAVRA DE CONTROLE AO DISPLAY
;MOV A,#H'6
;ACALL COMMAND_OUT
;MOV A,#H'0C
;ACALL COMMAND_OUT
;MOV A,#H'38
;ACALL COMMAND_OUT
;ACALL CLEAR_DISPLAY
;ACALL HOME_CURSOR
;ACALL CURSOR_OFF
; IDENTIFICACAO DO SISTEMA
;MOV DPTR,#INFO_1
;LCALL I_MEN_LCD
;MOV A,#0
;LCALL SET_C_R
;MOV DPTR,#INFO_2
;LCALL I_MEN_LCD
; PROGRAMA TAXA DE TRANSMISSAO 19200 BPS, 10 BITS
MOV h'98,#B'01010000 ; scon
MOV TMOD,#H'20 ; tmod
MOV TH1,#H'FD ; th1 (e6)
MOV h'87,#b'10000000 ; Duplica velocidade
SETB TR1
; ENDERECO INICIAL DA RAM
MOV DPTR,#PROGRAMA_EM_RAM
; CLEAR BUFFER SERIAL
MOV A,SBUF
;*********************************************************************
PED_H:
MOV SBUF,#'M'
ESP_H:
JNB RI,ESP_H
CLR RI
MOV R1,SBUF
MAN_H_R:
MOV SBUF,R1
ESP_FF_H:
JNB RI,ESP_FF_H
CLR RI
MOV A,SBUF
;*********************************************************************
PED_L:
MOV SBUF,#'M'
ESP_L:
JNB RI,ESP_L
CLR RI
MOV R0,SBUF
MAN_L_R:
MOV SBUF,R0
ESP_FF_L:
JNB RI,ESP_FF_L
CLR RI
MOV A,SBUF
; ******************************************************************
PED_C:
MOV SBUF,#'M'
ESP_C:
JNB RI,ESP_C
CLR RI
MOV A,SBUF
MOVX @DPTR,A
MAN_C_R:
MOVX A,@DPTR
MOV SBUF,A
INC DPTR
ESPERA_FF_C:
JNB RI,ESPERA_FF_C
CLR RI
MOV A,SBUF
;******************************************************************
MOV A,R0
DEC R0
JNZ MSB
DEC R1
MSB:
MOV A,R0
ORL A,R1
JNZ PED_C
CLR TI
; AQUI CARREGA ROTINA DE CHECKSUM E EXECUTA O PROGRAMA
CLR RI
MOV DPTR,#H'EFC0
MOV R0,#0
ECHECK:
JNB RI,ECHECK
MOV A,SBUF
CLR RI
MOVX @DPTR,A
MOVX A,@DPTR
MOV SBUF,A ;Apenas confirma o recebimento}
INC DPTR
INC R0
CJNE R0,#D'52,ECHECK
; EXECUTANDO CHECKSUM (PROGRAMA NA RAM)
LJMP H'EFC0
.org h'8000
PROGRAMA_EM_RAM:
.org h'8003
ext_0:
.org h'800b
timer_0:
.org h'8013
ext_1:
.org h'801b
timer_1:
.ORG h'8023
serial:
.ORG h'802b
I2C:
.ORG H'8033
T2_CAP_0:
.ORG H'803B
T2_CAP_1:
.ORG H'8043
T2_CAP_2:
.ORG H'804B
T2_CAP_3:
.ORG H'8053
ADC:
.ORG H'805B
T2_CP_0:
.ORG H'8063
T2_CP_1:
.ORG H'806B
T2_CP_2:
.ORG H'8073
TIMER_2:
;********************************************************************
.org h'4000
INSTRUCTION_INPUT:
.org h'4001
DATA_INPUT:
.org h'4002
LCD_STATUS:
.END INICIO
;3FC0
80C196
- Código: Selecionar todos
;**************************************************************************
;SISTEMA OPERACIONAL PARA O SISTEMA MINIMO BASEADO NO MICROCONTROLADOR 8098
;DA FAMILIA MCS-96
;PROJETISTAS : MIGUEL ALEXANDRE WISINTAINER
;OBJETIVO: DAR A CARGA DE UM PROGRAMA .COM GERADO PELO COMPILADOR 8098
; PELA INTERFACE SERIAL (9600 BPS) NO ENDERECO 4000H DA RAM E
; EXECUTA-LO.
;**************************************************************************
; 38400
; PRECISA DA RAM PARA FUNCIONAR
; DEFINICAO DE NOMES SIMBOLICOS PARA OS REGISTROS DE I/O DO 8X9X
.EQU ZERO , H'0 ; R/W
.EQU AD_COMMAND , H'2 ; W
.EQU AD_RES_LOW , H'2 ; R
.EQU AD_RES_HIG , H'3 ; R
.EQU HSI_MODE , H'3 ; W
.EQU HSO_TIME , H'4 ; W
.EQU HSI_TIME , H'4 ; R
.EQU HSO_COMMAND , H'6 ; W
.EQU HSI_STATUS , H'6 ; R
.EQU SBUF , H'7 ; R/W
.EQU INT_MASK , H'8 ; R/W
.EQU INT_PENDING , H'9 ; R/W
.EQU SPCON , H'11 ;
.EQU SPSTAT , H'11 ;
.EQU WATCHDOG , H'0A ; W
.EQU TIMER1 , H'0A ; R
.EQU TIMER2 , H'0C ; R
.EQU PORT0 , H'0E ; R
.EQU BAUD_REG , H'0E ; W
.EQU PORT1 , H'0F ; R/W
.EQU PORT2 , H'10 ; R/W
.EQU IOC0 , H'15 ; W
.EQU IOS0 , H'15 ; R
.EQU IOC1 , H'16 ; W
.EQU IOS1 , H'16 ; R
.EQU PWM_CONTROL , H'17 ; W
.EQU SP , H'18 ; R/W
.ORG H'28
AX:
AL: .DB 0
AH: .DB 0
BX:
BL: .DB 0
BH: .DB 0
CX:
CL: .DB 0
CH: .DB 0
DX:
DL: .DB 0
DH: .DB 0
ST_SERIAL: .DB 0
DADO_R: .DB 0
DADO_T: .DB 0
TEMP: .DB 0
.ORG H'2000
.DW Timer_Overflow
.ORG H'2002
.DW Ad_Conversion_Complet
.ORG H'2004
.DW Hsi_Data_Avaliable
.ORG H'2006
.DW Hig_Speed_Out
.ORG H'2008
.DW HSI.0
.ORG H'200A
.DW Soft_Timers
.ORG H'200C
.DW Serial_Port
.ORG H'200E
.DW Extint
.ORG H'2010
.DW Soft_Trap
.ORG H'2012
.DW Unimplemented_Code
.ORG H'2018
.DB B'11101101
;.DB H'FF, H'FF, H'FF, H'FF ;reserved (2014-2017)
;.DB B'11101100 ;CCB (2018)
; 11 ;no protection
; 10 ;add at most 3 wait states (don't hang!)
; 1 ;ALE (Standard Bus)
; 1 ;WR and BHE (Standard Bus)
; 0 ;dynmaic bus width (BUSWIDTH pin)
; 0 ;disable powerdown during development
;.DB H'20 ;"must contain 20h" (2019)
;.DB H'FF, H'FF, H'FF, H'FF ;reserved (201A-201D)
;.DB H'FF, H'FF ;reserved (201E-201F)
;.DB H'FF, H'FF, H'FF, H'FF ;security key (2020-2023)
;.DB H'FF, H'FF, H'FF, H'FF ;security key (2024-2027)
;.DB H'FF, H'FF, H'FF, H'FF ;security key (2028-202B)
;.DB H'FF, H'FF, H'FF, H'FF ;security key (202C-202F)
;.DB
.ORG H'2030
.DW TI
.ORG H'2032
.DW RI
.ORG H'2034
.DW FOURTH_ENTRY_HSI_FIFO
.ORG H'2036
.DW TIMER2_CAPTURE
.ORG H'2038
.DW TIMER2_OVERFLOW
.ORG H'203A
.DW EXTINT1
.ORG H'203C
.DW HSI_FIFO_FULL
.ORG H'203E
.DW NMI
; ENDERECO DE RESET 8X9X (SISTEMA OPERACIONAL - BOOT)
.ORG H'2080
LD SP,#H'FF
LOOP:
LDB PORT1,#B'01010101
LDB PORT1,#B'10101010
SJMP LOOP
PUSH #INICIO
RET
INFO1:.DB "SISTEMA",0
INFO2:.DB "80196 ",0
INFO3:.DB "(C) 1996 MIGUEL - BLUMENAU - SC"
PUT_CHAR:
PUSHF
LDB SBUF,DADO_T
PUT:
ORB TEMP,SPSTAT
JBC TEMP,5,PUT
ANDB TEMP,#H'0DF
POPF
RET
GET_CHAR:
PUSHF
GT_CHAR:
ORB TEMP,SPSTAT
JBC TEMP,6,GT_CHAR
LDB DADO_R,SBUF
ANDB TEMP,#H'0BF
POPF
RET
LE_BYTE:
LDB SBUF,#255
LCALL GET_CHAR
LDB AL,DADO_R
RET
LE_WORD:
LDB SBUF,#254
LCALL GET_CHAR
LDB AL,DADO_R
LCALL GET_CHAR
LDB AH,DADO_R
RET
LE_STRING:
PUSHF
PUSH AX
PUSH BX
LDB SBUF,#253
ESP_LETRA:
LCALL GET_CHAR
LDB AL,DADO_R
CMPB AL,#0
JE SAI_LETRA
NOR_LETRA:
STB AL,[BX]
INC BX
LJMP ESP_LETRA
SAI_LETRA:
STB AL,[BX]
POP BX
POP AX
POPF
RET
I_MEN_SERIAL:
PUSHF
PUSH AX
PUSH BX
COM_SE_NULL_S:
LDB AL,[BX]
CMPB AL,#0
JE S_MEN_S
IMP_S:
LDB DADO_T,AL
LCALL PUT_CHAR
; LCALL GET_CHAR ; ESPERA CONFIRMACAO QUE O COMPUTADOR RECEBEU O DADO
INC BX
LJMP COM_SE_NULL_S
S_MEN_S:
POP BX
POP AX
POPF
RET
CLEAR_TERMINAL:
LDB DADO_T,#252
LCALL PUT_CHAR
; LCALL GET_CHAR ; ESPERA CONFIRMACAO QUE O COMPUTADOR RECEBEU O DADO
RET
IMP_CHAR_S:
LDB DADO_T,AL
LCALL PUT_CHAR
; LCALL GET_CHAR ; ESPERA CONFIRMACAO QUE O COMPUTADOR RECEBEU O DADO
RET
IMP_B_SERIAL:
PUSHF
PUSH AX
PUSH BX
LDB BL,#D'10
LDB BH,#D'00
LDB AH,#0
NAO_ZERO:
DIVB AX,BL
INCB BH
PUSH AX
CMPB AL,#0
JE EH_ZERO
LDB AH,#0
LJMP NAO_ZERO
EH_ZERO:
POP AX
LDB AL,AH
ADDB AL,#H'30
LDB DADO_T,AL
LCALL PUT_CHAR
; LCALL GET_CHAR ; ESPERA CONFIRMACAO QUE O COMPUTADOR RECEBEU O DADO
DJNZ BH,EH_ZERO
POP BX
POP AX
POPF
RET
IMP_W_SERIAL:
PUSHF
PUSH AX
PUSH BX
PUSH CX
LD BX,#D'10
LD CX,#D'00
NAO_ZE_W_S:
DIV AX,BX
INC CX
PUSH BX
CMP AX,#0
JE EH_ZE_W_S
LD BX,#D'10
LJMP NAO_ZE_W_S
EH_ZE_W_S:
POP AX
ADDB AL,#H'30
LDB DADO_T,AL
LCALL PUT_CHAR
; LCALL GET_CHAR ; ESPERA CONFIRMACAO QUE O COMPUTADOR RECEBEU O DADO
DJNZ CX,EH_ZE_W_S
POP CX
POP BX
POP AX
POPF
RET
;*********************************************************************
VERIFICA_SE_TECLA_PRESSIONADA:
PUSH AX
LDB DADO_T,#251
LCALL PUT_CHAR
LCALL GET_CHAR
LDB AL,DADO_R
PUSHF
CMPB AL,#0
JNE FOI_PRESSIONADA
POPF
CLRC
PUSH #NAO_FOI_PRESSIONADA
RET
FOI_PRESSIONADA:
POPF
SETC
NAO_FOI_PRESSIONADA:
POP AX
RET
;*********************************************************************
LE_CODIGO_PRESSIONADA:
LDB DADO_T,#250
LCALL PUT_CHAR
LCALL GET_CHAR
LDB AL,DADO_R
PUSHF
CMPB AL,#0
JNE NA_T_EXTENDIDA
POPF
SETC
PUSH #T_EXTENDIDA
RET
NA_T_EXTENDIDA:
POPF
CLRC
T_EXTENDIDA:
LCALL GET_CHAR
LDB AL,DADO_R
RET
INICIO:
LDB TEMP,#H'20
; DEFINA P2.0 COMO TXD
LDB IOC1,#B'00100000
; MODO 1 DE TRANSMISSAO
LDB SPCON,#B'00001001
; BAUD RATE 38400 BPS (10 BITS = 1 START+8 DATA+1 STOP)
LDB BAUD_REG,#d'17
LDB BAUD_REG,#H'80
; ZERA ST_SERIAL
LDB ST_SERIAL,#0
;ENDERECO DO PROGRAMA EM RAM
LD BX,#PROGRAMA_EM_RAM
;CLEAR BUFFER
LDB DL,SBUF
;*********************************************************************
PED_H:
LDB SBUF,#'M'
ESP_H:
LDB ST_SERIAL,SPSTAT
JBC ST_SERIAL,6,ESP_H
ANDB ST_SERIAL,#B'10111111
LDB CH,SBUF ;LEITURA DO SPSTAT APAGA FLAGS
MAN_H_R:
LDB SBUF,CH ;LEITURA DO SPSTAT APAGA FLAGS
ESP_FF_H:
LDB ST_SERIAL,SPSTAT
JBC ST_SERIAL,6,ESP_FF_H
ANDB ST_SERIAL,#B'10111111
LDB DL,SBUF ; SEM EFEITO
;*********************************************************************
PED_L:
LDB SBUF,#'M'
ESP_L:
LDB ST_SERIAL,SPSTAT
JBC ST_SERIAL,6,ESP_L
ANDB ST_SERIAL,#B'10111111
LDB CL,SBUF
MAN_L_R:
LDB SBUF,CL
ESP_FF_L:
LDB ST_SERIAL,SPSTAT
JBC ST_SERIAL,6,ESP_FF_L
ANDB ST_SERIAL,#B'10111111
LDB DL,SBUF ; SEM EFEITO
; ******************************************************************
PED_C:
LDB SBUF,#'M'
ESP_C:
LDB ST_SERIAL,SPSTAT
JBC ST_SERIAL,6,ESP_C
ANDB ST_SERIAL,#B'10111111
LDB DL,SBUF
STB DL,[BX] ; JOGA PARA O BUFFER
MAN_C_R:
LDB SBUF,[BX]+
ESPERA_FF_C:
LDB ST_SERIAL,SPSTAT
JBC ST_SERIAL,6,ESPERA_FF_C
ANDB ST_SERIAL,#B'10111111
LDB DL,SBUF ; SEM EFEITO
;******************************************************************
DEC CX
CMP CX,#0
JNE PED_C
; DEFINA P2.0 COMO TXD
LDB IOC1,#B'00100000
; MODO 1 DE TRANSMISSAO
LDB SPCON,#B'00001001
; BAUD RATE 9600 BPS (10 BITS = 1 START+8 DATA+1 STOP)
LDB BAUD_REG,#d'143
LDB BAUD_REG,#H'80
LJMP H'4080
.ORG H'4000
PROGRAMA_EM_RAM:
Timer_Overflow:
.ORG H'4002
Ad_Conversion_Complet:
.ORG H'4004
Hsi_Data_Avaliable:
.ORG H'4006
Hig_Speed_Out:
.ORG H'4008
HSI.0:
.ORG H'400A
Soft_Timers:
.ORG H'400C
Serial_Port:
.ORG H'400E
Extint:
.ORG H'4010
Soft_Trap:
.ORG H'4012
Unimplemented_Code:
.ORG H'4030
TI:
.ORG H'4032
RI:
.ORG H'4034
FOURTH_ENTRY_HSI_FIFO:
.ORG H'4036
TIMER2_CAPTURE:
.ORG H'4038
TIMER2_OVERFLOW:
.ORG H'403A
EXTINT1:
.ORG H'403C
HSI_FIFO_FULL:
.ORG H'403E
NMI:
.ORG H'4080
.DB "RESERVADO PARA O PROGRAMA EM RAM..."
.END
