decoder 8 x 256

[tcpipchip]

Como estamos convertendo a M++ do DIGITAL WORKS para PROTEUS e termos um clock de 50Hz para 50KHZ...me deparei com um problema: a construção de um RAM com CHIP SELECT e apenas um pino para indicar READ/WRITE...então resolvi construir uma RAM de 256 endereços...e me deparei com o tamanho do address decoder
Então resolvi com 2 74154
Anexo um preview...

T+
TCPIPCHIP

[Djalma Toledo Rodrigues]

E o 74158 ?

FAST AND LS TTL DATA
1-OF-8 DECODER/
DEMULTIPLEXER
The LSTTL / MSI SN54 / 74LS138 is a high speed 1-of-8 Decoder /
Demultiplexer. This device is ideally suited for high speed bipolar memory
chip select address decoding. The multiple input enables allow parallel ex-
pansion to a 1-of-24 decoder using just three LS138 devices or to a 1-of-32
decoder using four LS138s and one inverter. The LS138 is fabricated with the
Schottky barrier diode process for high speed and is completely compatible
with all Motorola TTL families.
•
Demultiplexing Capability
Multiple Input Enable for Easy Expansion
Typical Power Dissipation of 32 mW
Active Low Mutually Exclusive Outputs
Input Clamp Diodes Limit High Speed Termination Effects

[tcpipchip]

com o 74154 vai ficar bem mais simples.