ASM51

Andre_Cruz escreveu:t2) Se caso ela for uma interupção de mudança de estado, ela acontece a cada transição de 0 para 1 e de 1 para 0? Que não encontrei como configurar a borda que vai gerar a interupção.

Tentei configurar apenas estes registradores que mencionei, e não consegui gerar a interupção.

Agradeço a ajuda de todos

make the corresponding GPIO pin an output (i.e., put
the contents of the output latch on the selected pin).
The exception is GP3, which is input only and its
TRISIO bit will always read as ‘1’. Example 3-1 shows
how to initialize GPIO.
Reading the GPIO register reads the status of the pins,
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. There-fore,
a write to a port implies that the port pins are read,
this value is modified, and then written to the port data
latch. GP3 reads ‘0’ when MCLREN = 1.
The TRISIO register controls the direction of the
GP pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISIO
register are maintained set when using them as analog
inputs. I/O pins configured as analog inputs always
read ‘0’.
EXAMPLE 3-1: INITIALIZING GPIO
3.2 Additional Pin Functions
(OPTION<7>).
REGISTER 3-1: GPIO — GPIO REGISTER (ADDRESS: 05h)
Note: Additional information on I/O ports may be
found in the PIC ® Mid-Range Reference
Manual, (DS33023).
Note: The ANSEL (9Fh) and CMCON (19h)
registers (9Fh) must be initialized to
configure an analog channel as a digital
input. Pins configured as analog inputs will
read ‘0’. The ANSEL register is defined for
the PIC12F675.
BCF STATUS,RP0 ;Bank 0
CLRF GPIO ;Init GPIO
MOVLW 07h ;Set GP<2:0> to
MOVWF CMCON ;digital IO
BSF STATUS,RP0 ;Bank 1
CLRF ANSEL ;Digital I/O
MOVLW 0Ch ;Set GP<3:2> as inputs
MOVWF TRISIO ;and set GP<5:4,1:0>
;as outputs
bit 7-6: Unimplemented: Read as ’0’
bit 5-0: GPIO<5:0>: General Purpose I/O pin.