Moderadores: andre_luis, 51, guest2003, Renie
//*****************************************************************************
//=============================================================================
// Compiled using MPLAB-C18 V3.16
// Include Files: P18F66J10.H,
//=============================================================================
//----------------------------------------------------------------------------
#include <p18f66j10.h>
#include <delays.h>
#include <sw_gps.h>
#include <sw_uart2.h>
#include <string.h>
//****************************************************************************
//Background Debugger Enable bit:
#pragma config DEBUG = ON
// Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug
//#pragma config DEBUG = OFF
// Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins
//*****************************************************************************
//Extended Instruction Set Enable bit:
#pragma config XINST = OFF
//Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
//#pragma config XINST = ON
//Instruction set extension and Indexed Addressing mode enabled
//*****************************************************************************
//Stack Overflow/Underflow Reset Enable bit:
//#pragma config STVREN = OFF // Reset on stack overflow/underflow disabled
#pragma config STVREN = ON // Reset on stack overflow/underflow enabled
//*****************************************************************************
//Watchdog Timer Enable bit:
#pragma config WDTEN = OFF // WDT disabled (control is placed on SWDTEN bit)
//#pragma config WDTEN = ON // WDT enabled
//******************************************************************************
//Code Protection bit:
//#pragma config CP0 = ON // Program memory is code-protected
#pragma config CP0 = OFF // Program memory is not code-protected
//*******************************************************************************
//Fail-Safe Clock Monitor Enable bit:
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor disabled
//#pragma config FCMEN = ON // Fail-Safe Clock Monitor enabled
//-----------------------------------------------------------------------------
//Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit:
#pragma config IESO = OFF // Two-Speed Start-up disabled
//#pragma config IESO = ON // Two-Speed Start-up enabled
//-----------------------------------------------------------------------------
//Default/Reset System Clock Select bit:
//#pragma config FOSC2 = OFF // INTRC enabled as system clock when OSCCON<1:0> = 00
//#pragma config FOSC2 = ON // Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00
//-----------------------------------------------------------------------------
//Oscillator Selection bits:
#pragma config FOSC = HS // HS oscillator
//#pragma config FOSC = HSPLL // HS oscillator, PLL enabled and under software control
//#pragma config FOSC = EC // EC oscillator, CLKO function on OSC2
//#pragma config FOSC = ECPLL // EC oscillator, PLL enabled and under software control, CLK function on OSC2
//-----------------------------------------------------------------------------
//Watchdog Timer Postscaler Select bits:
//#pragma config WDTPS = 1 // 1:1
//#pragma config WDTPS = 2 // 1:2
//#pragma config WDTPS = 4 // 1:4
//#pragma config WDTPS = 8 // 1:8
//#pragma config WDTPS = 16 // 1:16
//#pragma config WDTPS = 32 // 1:32
//#pragma config WDTPS = 64 // 1:64
//#pragma config WDTPS = 128 // 1:128
//#pragma config WDTPS = 256 // 1:256
//#pragma config WDTPS = 512 // 1:512
//#pragma config WDTPS = 1024 // 1:1024
//#pragma config WDTPS = 2048 // 1:2048
//#pragma config WDTPS = 4096 // 1:4096
//#pragma config WDTPS = 8192 // 1:8192
//#pragma config WDTPS = 16384 // 1:16384
#pragma config WDTPS = 32768 // 1:32768
//-----------------------------------------------------------------------------
//ECCP2 MUX bit:
//#pragma config CCP2MX = ALTERNATE // ECCP2/P2A is multiplexed with RE7
#pragma config CCP2MX = DEFAULT // ECCP2/P2A is multiplexed with RC1
//-----------------------------------------------------------------------------
void main(void);
main(void){
// seu codigo aqui
}
Release build of project `C:\USB HID C ANSI MPASMC18\USB HID C ANSI MPASMC18.mcp' started.
Mon May 04 16:57:55 2009
----------------------------------------------------------------------
Clean: Deleting intermediary and output files.
Clean: Deleted file "C:\USB HID C ANSI MPASMC18\MAIN.o".
Clean: Done.
Executing: "C:\MCC18\bin\mcc18.exe" -p=18F14K50 /i"C:\MCC18" "MAIN.C" -fo="MAIN.o" -w3 -Ou- -Ot- -Ob- -Op- -Or- -Od- -Opa-
Executing: "C:\MCC18\bin\mplink.exe" /l"C:\MCC18\lib" "project.lkr" "MAIN.o" "C:\MCC18\lib\p18F14K50.lib" /z__MPLAB_BUILD=1 /o"C:\USB HID C ANSI MPASMC18\USB HID C ANSI MPASMC18.cof" /M"C:\USB HID C ANSI MPASMC18\USB HID C ANSI MPASMC18.map" /W
MPLINK 4.1, Linker
Copyright (c) 2006 Microchip Technology Inc.
Error - could not find file 'MAIN.o'.
Errors : 1
Link step failed.
----------------------------------------------------------------------
Release build of project `C:\USB HID C ANSI MPASMC18\USB HID C ANSI MPASMC18.mcp' failed.
Mon May 04 16:57:57 2009
----------------------------------------------------------------------
BUILD FAILED
ivan escreveu:Fabim,
O main.o é a o arquivo(saída) objeto da compilação do seu projeto.
Reparei q vc usa " "(espaços em branco) no nome do diretório, tenta
retirá-los e vê o q acontece. Acredito q seja isto.
Ivan
// Buffer addresses in USB Ram
#define BuffEP0OUTAddress (0x0410)
#define BuffEP0INAddress ( BuffEP0OUTAddress + USB_BUFF_SIZE)
#define BuffEP1OUTAddress ( BuffEP0INAddress + USB_BUFF_SIZE)
#define BuffEP1INAddress ( BuffEP1OUTAddress + USB_BUFF_SIZE)
#define UsbStringBufferAddress ( BuffEP1INAddress + USB_BUFF_SIZE)
// the USB buffer descriptors
volatile short BDEP0OUTStat absolute 0x0400;
volatile short BDEP0OUTCnt absolute 0x0401;
volatile int BDEP0OUTAdr absolute 0x0402;
volatile short BDEP0INStat absolute 0x0404;
volatile short BDEP0INCnt absolute 0x0405;
volatile int BDEP0INAdr absolute 0x0406;
volatile short BDEP1OUTStat absolute 0x0408;
volatile short BDEP1OUTCnt absolute 0x0409;
volatile int BDEP1OUTAdr absolute 0x040A;
volatile short BDEP1INStat absolute 0x040C;
volatile short BDEP1INCnt absolute 0x040D;
volatile int BDEP1INAdr absolute 0x040E;
// the USB buffers themselves
volatile short BuffEP0OUT[USB_BUFF_SIZE] absolute BuffEP0OUTAddress;
volatile short BuffEP0IN[USB_BUFF_SIZE] absolute BuffEP0INAddress+1;
volatile short BuffEP1OUT[USB_BUFF_SIZE] absolute BuffEP1OUTAddress+1;
volatile short BuffEP1IN[USB_BUFF_SIZE] absolute BuffEP1INAddress;
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